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PERAM: Ultra Power Efficient Array Multiplier Using Reversible Logic for High-Performance MAC
Reversible logic is an emerging technology that is helpful in diverse fields such as genetic programming, high-speed VLSI design, DNA computing and bioinformatics, quantum computing, etc. Reversible computation differs from conventional computation as it safeguards information while manipulating it. Multiplier is a crucial component of Digital Signal Processing (DSP). In general, DSP application requires low power dissipation multiplier. But in conventional computation, the multiplier dissipates more power than a reversible multiplier. In this paper, PERAM deals with reversible array multiplier. As it consists of rudimentary reversible gates like CCNOT and CNOT, analysis will be uncomplicated. The proposed design methodology is implemented and verified in cadence© virtuoso of 45 nm technology showing the improvement of 77.76% in terms of power, 71.39% in terms of power delay product. PERAM shows a great variation in the power and power delay product.
پرس و جو: چند عرضهکننده پرتو موثر با استفاده از منطق قابلانطباق برای MAC با عملکرد بالا
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